Contention-aware selection strategy for application-specific network-on-chip
نویسندگان
چکیده
Network-on-chip (NoC) performance largely depends on the underlying deadlock-free and efficient routing algorithm. The effectiveness of any adaptive routing algorithm strongly depends on the underlying selection strategy. When the routing function returns a set of admissible output channels with cardinality greater than one, a selection function is used to select the output channel to which the packet will be forwarded. In this study a novel selection strategy, LATEX, is proposed that can be used with any adaptive routing algorithm for specified applications. The objective of the proposed selection strategy is to efficiently balance traffic load and reach better performance results. Performance evaluation is carried out by using a flit-accurate simulator under two real traffic scenarios. Result experiments show that the proposed selection strategy applied to several routing algorithms significantly improves average delay, max delay and power consumption.
منابع مشابه
Congestion estimation of router input ports in Network-on-Chip for efficient virtual allocation
Effective and congestion-aware routing is vital to the performance of network-on-chip. The efficient routing algorithm undoubtedly relies on the considered selection strategy. If the routing function returns a number of more than one permissible output ports, a selection function is exploited to choose the best output port to reduce packets latency. In this paper, we introduce a new selection s...
متن کاملCost-aware Topology Customization of Mesh-based Networks-on-Chip
Nowadays, the growing demand for supporting multiple applications causes to use multiple IPs onto the chip. In fact, finding truly scalable communication architecture will be a critical concern. To this end, the Networks-on-Chip (NoC) paradigm has emerged as a promising solution to on-chip communication challenges within the silicon-based electronics. Many of today’s NoC architectures are based...
متن کاملReliability and Performance Evaluation of Fault-aware Routing Methods for Network-on-Chip Architectures (RESEARCH NOTE)
Nowadays, faults and failures are increasing especially in complex systems such as Network-on-Chip (NoC) based Systems-on-a-Chip due to the increasing susceptibility and decreasing feature sizes. On the other hand, fault-tolerant routing algorithms have an evident effect on tolerating permanent faults and improving the reliability of a Network-on-Chip based system. This paper presents reliabili...
متن کاملA High Performance Network‐on‐chip System with Path‐congestion‐ Aware Adaptive Routing
Network on chip is an emerging concept for communication within large VLSI systems implemented on a single silicon chip. Routing is an important parameter. The routing algorithm should be implemented by simple logic and number of data buffers should be minimal. So selection of routing algorithm is critical. I am going to propose an adaptive routing technique that increases the effectiveness of ...
متن کاملA fuzzy-based performance-enhancing input selection technique for network-on-chip
The performance of network-on-chip (NOC) largely depends on the underlying routing techniques. A routing technique has two constituencies: output selection and input selection. This paper focuses on the improvement of input selection part. Two traditional input selections have been used in NOC, firstcome-first-served (FCFS) input selection and Round-Robin input selection. Also, recently a conte...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید
ثبت ناماگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید
ورودعنوان ژورنال:
- IET Computers & Digital Techniques
دوره 7 شماره
صفحات -
تاریخ انتشار 2013